Jacquard FPGA Studio Log in

From SystemVerilog to a programmed board, in a browser tab.

Jacquard compiles your testbench with Icarus Verilog, synthesizes your design with yosys and nextpnr, and writes the bitstream to an iCE40 board over USB. The toolchain runs on the server. You bring a browser and a cable.

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The Simulate screen: a SystemVerilog testbench in the editor above a waveform viewer showing a clock, a reset and a state machine.

Three stages over the same files

Simulate, Build and Program are separate screens, not tabs of one panel — different questions about your design, with different inputs and different answers. The workspace and the file list are shared, because the files are.

Waves that use your names

A VCD carries no type information, so most viewers show a typedef enum as 0 and 1. Jacquard reads the names out of your source and labels the waveform HIGH / LOW / S2, the way a desktop simulator does. Click the value column to get the raw encoding back.

  • Unfold a bus into one row per bit, and fold it away again.
  • Per-signal radix: hex, binary, decimal, signed, ASCII.
  • Drag signals into the order you want to read them in.
  • Drag the time axis to zoom to a span; the whole instance tree is in the sidebar.
  • Save PNG exports the rows on screen, captioned, for a lab report.
The waveform panel filling the window: a state signal drawn as HIGH and LOW rather than 1 and 0, a cursor with its time in the toolbar, and the instance tree beside it.

Pins in a table, not in a text file

The pin table is your top module's ports, one row each, with the board's pin numbers in a dropdown. A bus takes one row and expands. Conflicts are marked as you make them, and a port with no pin fails the build rather than being placed somewhere you did not mean.

  • Import a Radiant .pdc or an icestorm .pcf; export either back.
  • The pins travel in the .zip with your sources.
  • Lattice primitives — HSOSC, RGB, SB_SPRAM256KA — are handled, and the server lists which ones it knows.
The Build screen: a pin table on the left with three ports assigned to board pins, and on the right the resource use, the achieved clock frequency and the build log.

One cable, no vendor programmer

Program writes the bitstream into the board's SPI flash over WebUSB. The browser asks which device to use; nothing is installed and no driver is signed. If your browser has no WebUSB, the screen hands you the one-line command to do it from a terminal instead.

  • The design stays on the board when you unplug it.
  • What was built, from which module, and at what clock, before you write it.
  • Or download the .bin and program it however you already do.
The Program screen: a card naming the board, the bitstream and its size, the module it was built from, the achieved clock frequency, and what pressing Program will do.

Also true

Bring a design. Leave with a blinking board.

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